Transmitting data involves a transfer of data from a source domain to a destination domain. The transfer of data needs to be predictable to ensure that the destination domain receives the proper data from the source domain.
Meta-stability is the ability of a logic component (for example a flip-flop) to possess an indeterminate/unpredictable value for a finite period of time. Meta-stability occurs when the logic component attempts to capture (that is, sample) data before the data (that is, the information intended to occur on the component) is stable.
The probability of meta-stability directly effects the mean-time-between-failure (“MTBF”) calculation for a product. As the MTBF increases, the usable duration and desirability of the product decreases. Thus, meta-stability needs to be avoided.
Asynchronous data transfers involve transmitting data from a source domain (for example, a microprocessor) to a destination domain (for example, a memory device) operating (that is, capturing or sampling data) at different clock phases and/or frequencies. Asynchronous data transfers need an interface that compensates for the effects of meta-stability, ensuring the data sent between the two domains is stable before sampling.
Latency is a delay in the transfer of data that an interface introduces to compensate for the effects of meta-stability.
Like reference symbols in the various drawings indicate like elements.